1. Field of the Invention
The present invention relates to chemical mechanical polishing of substrates, and, more particularly, to an apparatus and a method that improves the conditioning process in chemical mechanical polishing procedures performed on substrates.
2. Description of the Related Art
Advances in the field of integrated circuit (IC) fabrication has generally resulted in steadily decreasing feature sizes of the components that form modem integrated circuits, or that are necessary to manufacture these integrated circuits. In particular, strong competition in the semiconductor market demands that all of the available wafer area should effectively be used for the production of integrated circuits. Due to ever decreasing feature sizes, it is desirable that defect counts on the semiconductor wafer be reduced below levels which were previously tolerable for previous circuit designs. This defect reduction enables the formation of integrated circuits with advanced circuit designs that use a higher percentage of the chip area.
Since modem circuit designs often require the formation of a plurality of layers on top of each other, and many photolithography steps accompanying the layer formation, it is desirable that the layers formed above the substrate have an approximately planar surface at various stages in the fabrication process in order to more efficiently form subsequent layers, such as metallization layers in the semiconductor device. As used in the present application, the concept of planarizing a substrate refers to, and should be understood to include, the planarization of an uppermost surface of a process layer formed above the substrate, as well as the planarization of a semiconducting substrate itself.
To enhance the overall planarity of a substrate, and to improve the immunity of the substrate to certain types of defects, a process commonly referred to as chemical mechanical polishing (CMP) has become a standard procedure in manufacturing integrated circuits. CMP is a process for improving the surface planarity of a substrate, e.g., of a semiconductor wafer, a process layer formed above the substrate, etc., and it involves the use of a mechanical pad polishing system with a chemically reactive slurry. The rate of material removed from the substrate is dependent on several factors, including among others, the chemicals and abrasives used in the slurry, the surface pressure at the polishing pad-substrate interface, the net motion between the substrate and the polishing pad at each point on the substrate, the temperature of the slurry, which is significantly affected by the amount of friction created by the net motion, the degree of saturation of the slurry with ablated particles, and the state of the polishing surface of the polishing pad.
Most polishing pads are formed of a cellular microstructure polymer material having numerous voids which are filled by the slurry during operation. During polishing operations, particles that have been removed from the substrate surface tend to accumulate in the slurry. As a result, as the operations continue, a densification of the slurry within the voids occurs. Consequently, the polishing rate tends to steadily decrease, thereby disadvantageously affecting reliability of the planarizing process of the substrate surfaces which, in turn, may result in additional circuit failures.
To overcome this problem, most CMP apparatuses use a polishing pad conditioner that xe2x80x9crenewsxe2x80x9d the polishing surface of the pad. In known CMP systems, one conditioner per polishing platen is provided, wherein the exhausted surface of the polishing pad is ablated by the relatively hard material of the conditioner once the polishing rate is assessed, e.g., by an operator, to be too low. Alternatively, an xe2x80x9cin-situxe2x80x9d conditioner is used which is in contact with the polishing pad while the substrate is polished. The first alternative leads to significant variations of the polishing rate due to the difference of the renewed surface of the pad compared to the exhausted surface used immediately before the conditioning. The in-situ process is not as effective in refreshing the pad surface as the former alternative, since a substantially softer conditioner material has to be used in order to not unduly shorten the life time of the polishing pad. As a result, process conditions have to be monitored more frequently or steadily, and adjusted accordingly to meet process requirements in an up-to-date integrated circuit production flow. Accordingly, it is necessary to employ a plurality of test or dummy wafers before and during various production steps to determine the removal rates and the efficiency of CMP systems. All of this testing results in an increased downtime and, hence, higher production costs.
The present invention is directed to a method of making a semiconductor device that solves, or at least reduces, some or all of the aforementioned problems.
The present invention is directed to a method and apparatus for performing polishing operations on substrates in an integrated circuit manufacturing environment. In one embodiment, the apparatus is comprised of a movable polishing platen, a polishing pad positioned on the platen, and a polishing arm that is adapted to receive and move the substrate relative to the polishing pad. The apparatus further comprises a first pad conditioner with a first conditioning surface that is positionable to allow contact between the first conditioning surface and the polishing pad, and a second pad conditioner with a second conditioning surface that is positionable to allow contact between the second conditioning surface and the polishing pad. In one embodiment, the method of the present invention comprises positioning a substrate to be polished in a polishing tool, supplying a polishing slurry to the tool, and providing relative movement between the substrate and a polishing pad. The method further comprises urging first and second pad conditioners into contact with the polishing pad, and providing a relative movement therebetween.